Realisation of Cache Optimisation using New Technique
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Abstract
An impressive design of cache memory is an important view in computer architecture to boost or increase the system performance. In this task we study the response of reducing the cache performance to the cache address on the performance experimentally. Since cache miss penalty has direct contact on the system’s performance. To overtake from this, we proposed a new model in which we use revisited second chance FIFO (RS FIFO), which uses partial comparator and use multiple search to increase cache hit rate, by reducing cache miss rate. The Above proposed technique gives maximum hit rate when using revisited SFIFO rather than FIFO. Keywords: cache mapping technique; hit rate; miss rate; cache optimisation; cache replacement policies.
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