Digital Modeling to Resolution Scaling in Soc for Video Coding

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S. K. Fairooz
Dr. B. K. Madhavi

Abstract

Unlike most other information technologies, which have enjoyed an exponential growth for the past several decades, display resolution
has largely stagnated. Low display resolution has in turn limited the resolution of digital images. Scaling is a non-trivial process that involves a
trade-off between efficiency, smoothness and sharpness. As the size of an image is increased, so the pixels, which comprise the image, become
increasingly visible, making the image to appear soft. Super scalar representation of image sequence is limited due to image information present
in low dimensional image sequence. In this work, we analyze re-enhancement work on pixel classification based resolution enhancement,
namely, resolution synthesis, and discuss its applicability to low complexity customer grade display systems. In the paper an FPGA
implementation of the proposed algorithm is presented, and computational complexity analysis is observed.

Keywords: Image, Super Resolution, FPGA, Super Scalar.

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