Fault Diagnosis In Vlsi Chips Using Different Strategies

Divya Sharma, Dr B. K. Kaushik, Dr R. P. Agarwal


In the recent years integrated circuit technology has evolved rapidly due to various innovations in computers, IT, electronics, medical, etc. The complex geometry of interconnects and high operational frequency introduce wire parasitic and inter-wire parasitic. These parasitic causes delay, power dissipation and crosstalk that may affect the signal integrity in VLSI system. Accurate analysis, sophisticated design, effective test methods and diagnostic algorithms are the requirement to ensure the proper functionality and reliability of VLSI circuits. New fault diagnostic techniques and algorithms are required which can deduct large number of faults in less time. Here is a discussion about various strategies for fault diagnosis.


Keywords: interconnects, faults, fault diagnosis, SoCs and NoCs

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DOI: https://doi.org/10.26483/ijarcs.v3i2.1086


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